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XiBIF - Xilinx Board Interface IP -- Simple bridge between Python and Programmable Logic (PL) in a Xilinx SoC, such as a Zynq-7000.

Minimal test project that can be used to create a bootable yocto linux image

This repository contains the VHDL code of the proposed ADC from the paper "An FPGA-based 7-ENOB 600 MSample/s ADC without any External Components" published at the conference FPGA 2021.

Automatic mirror from https://github.com/LukiLeu/FPGA_ADC

Configurations for the PS Part of our Microzed Boards

Controller Board with Processor Module Toradex Colibri iMX6